Flip chip bonder placing a die face-down onto a substrate at Pin 1 Semiconductor
About

About Flip Chip Assembly at Pin 1 Semiconductor

Pin 1 Semiconductor provides flip chip assembly services including solder reflow, thermocompression, thermosonic, copper pillar and epoxy attach technologies, with pitch sizes down to 150 microns.

  • Solder reflow flip chip
  • Thermocompression and thermosonic bonding
  • Copper pillar and epoxy attach
  • Pitch sizes down to 150 µm
  • Placement accuracy to ±5 µm
  • Epoxy underfill and mixed flip chip / wire bond builds
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Equipment

Flip Chip Bonding Equipment

Two flip chip bonders cover precision placement and automatic production.

SEC Omni Bonder

Semiconductor Equipment Corp Omni Bonder with ±5 µm placement accuracy. Equipped with a heated stage and an ultrasonic bond head for thermosonic flip chip attach.

ESEC Micron 2

Automatic flip chip bonder with ±12 µm placement accuracy.

Capabilities

Thermosonic Flip Chip and Mixed Technologies

The Omni Bonder's heated stage and ultrasonic bond head enable thermosonic flip chip attach. With the thermosonic approach, we can direct bond gold bumps to gold pads on the substrate.

We can also combine flip chip with other technologies, such as wire bonding of an interposer IC. After flip chip attach, we can underfill with epoxy to provide added strength and reliability.

Specifications

Flip Chip Assembly Specifications

Have a requirement that falls outside the table? Contact us — chances are we can accommodate it.

ParameterSpecification
TechnologiesSolder reflow, thermocompression, thermosonic, copper pillar, epoxy attach
Minimum pitch150 µm
Placement accuracy±5 µm (SEC Omni Bonder), ±12 µm (ESEC Micron 2)
Thermosonic attachGold bumps direct bonded to gold substrate pads
UnderfillEpoxy underfill
Mixed technologyFlip chip combined with wire bonding (e.g. interposer IC)
EquipmentSEC Omni Bonder, ESEC Micron 2

Ready to move your project forward?

From a single wafer to full production runs — our Garnet Valley, PA facility turns your design files into packaged devices.

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